Q-Bus Memory Diagnostics and Repair
Noel Chiappa
jnc at mercury.lcs.mit.edu
Fri Sep 9 09:29:51 CDT 2016
> From: Jerry Weiss
> I'll give that a try.
Please let us know how you make out with it! :-)
> I've been making do with the SMS 1000 manual for the basic settings as
> well.
Yeah, that's better than nothing. I just looked over my notes from looking
into the CMV-x000, and alas I don't have any useful data to report (yet).
> I ran a different diagnostic w/o parity testing enabled.
That's kind of odd; the top block of results make it look like it's dropping
the 0400 bit (e.g. "S/B", which I assume means 'should be', = 161612, and
"WAS" = 161212 makes it sound like it dropped the 0400 bit); but the block
below makes it look like it's picking that bit (it shows 0 and 0400 under the
S/B and WAS columns for that location).
Eh, no biggie; clearly the 0400 bit has issues! ;-)
> I see stuck bits and address decoding problems. It looks like some
> memory addresses return the contents of another address.
Not sure I see that happening?
If your CPU is an 11/73 (which can directly 'access' [hate that verbism :-]
all of memory from ODT, unlike the 11/23 which is restricted to the bottom
256KB), try playing around with a failing location, and its alternative,
directly, and see if a store of random data into one can be read back directly
from the other; e.g. set 03561212 to 0, store 0123456 in 03561612, and then
try reading 03561212, etc. Then go back to 03561612 and see if you get
0123456 back when reading it. Etc, etc.
That should quickly verify if the problem is just some locations which
drop/pick bits, or if there are addressing issues.
> I may just clip the power lead on the chip I think is faulty to confirm
> I have the correct target.
I looked at my CMV-x000 boards, and on all of them, the chips are soldered in,
not socketed (which most of the other ones I looked into had, which made
working out the chip<->bit tables very easy - pull random chips, and see what
happened :-).
But your proposed move should let you identify if you have the right
chip. Once done, you might want to check low memory from ODT to make sure you
don't have the banks inverted (i.e. what looks like the top bank is not in
fact the bottom). It probably wouldn't boot the diagnostics, if so, but it'd
nice to find out directly!
> Hopefully the bit ordering matches the board marking and bottom row is
> the highest address of memory banks.
Please let me know what the layout is, and I'll start the Computer History
wiki page for this board with that info.
Noel
More information about the cctech
mailing list