vt100 terminfo with padding for an actual vt100?

[Fritz Mueller]

Hi all, thanks for the help/advice!

Peter, the table you posted comes closest to what I was originally looking for.  I think I will end up just doing some testing to identify the troublesome control sequence and find out how much padding is needed in each case.  I’ll post back the numbers I find (thought it may be a little bit before I get back to this particular project).

I do not think the VT100 supports hardware flow control.

Interesting the comments on the USB serial converters — I am using a Keytronics (now Tripp-Lite) USA-19H, and I think these are generally well regarded?  But thinking on it, I bet USB has something to do with it here — perhaps buffer latency through the USB drivers is keeping software flow-control (xon/xoff) from functioning effectively at higher baud rates, which is another reason I think proper padding values might be a good alternative.

Another idea that might work would be to take an FPGA proto board that I have and hack up a better serial port — something with some buffering and xon/xoff logic sitting downstream of the USB interface.

	cheers,
	   —FritzM.