PDP-8 core memory problems.

[Jon Elson]

On 09/05/2016 05:46 PM, Mattis Lind wrote:
> måndag 5 september 2016 skrev Jon Elson <elson at pico-systems.com>:
>
>> On 09/05/2016 01:59 PM, Mattis Lind wrote:
>>
>>> I have now concluded that the fault is in the core memory module itself.
>>> The sense winding is broken on bit plane 7.
>>>
>>>
>>> Have you actually ohmed out the sense/inhibit wire?
> This is by the way a four wire stack. Separate sense and inhibit wire.
OH!  I didn't know any PDP-8 had 4-wire planes.  Very 
interesting. Hmmm, you could rig a pulse transformer to the 
inhibit wire to bring signals over to the sense amp.
> Come to think of it, since the inhibit wire is OK, would it be possible to
> arrange it as a three wire stack somehow. Change the sense amp and inhibit
> drivers so that they use the same wire?
Ah, you already thought of that.  Well, it SHOULD be 
possible. You'd probably put a resistor in series with the 
pulse transformer so that all the select current went 
through the inhibit wire.  Then, the only problem would be 
that the sense amp gets hit with a big pulse during the 
writeback.  As long as the sense amp recovers from the 
overload before the next read cycle, it ought to work.  Some 
4-wire planes were set up so the polarity of half the sense 
wires were opposite to the inhibit, so the coupled inhibit 
current balanced out to zero in the sense winding.  Any 
mid-sized 1:1 pulse transformer should do the coupling, the 
currents might be pretty high, but the duration isn't very 
long.  (Minor nit, the inhibit wires only get pulsed one 
direction, so you might need a resistive path across the 
secondary to discharge the flux build up so it doesn't 
saturate.)
> Maybe Brent can come in with some advice if this is possible or just
> stupid.
It is NOT stupid, I think it could really work!

Jon