ISO: PDP-11/40 LTC and Stack Limit options

[Noel Chiappa]

    > It's possible that they didn't bother wiring NPG to that slot, but sent
    > it directly to the NPG pin on the 'UNIBUS out' connector

Sho'nuff; the 11/40 prints indicate (pg. 86) that "BUS NPG" goes directly from
C07P2 ("Source" - you can see the generation on print K4-5, pg. 62, lower
right side), to A09U1 (NPG on the UNIBUS Out connector), do not pass through
SPC slot 9, do not collect a grant.

I dunno about any other oddities you're seeing, but I think this one is
solved. :-)

	Noel