MEM11A Update

[Guy Sotomayor]

Just wanted to let folks know where the MEM11A (as opposed to the UMF11) is.

All of the verilog code is written for the CPLD and I’ve simulated full unibus transactions
to the FRAM and everything seems to work.

I’m almost done with schematic entry.  I just have a few things to clean up and verify.

I’ve done basic component placement (still have to finish placing the 40+ bypass capacitors).

I’m planning on doing a 4 layer board so I can avoid having routing issues due to 3 different
power supply voltages (yea, modern low voltage design meets 5v).  I haven’t done a 4 layer
design before, so I’m in for a bit of learning (mainly on how to “pour” the inner layers).

I’m still undecided if I’m going to place some (or all) of the bypass caps on the backside of the
board.  It would make things easier especially around the 100pin CPLD.

At this point I’m hoping to FAB a set of prototype boards in about a month from now (mid to
late April).  I’ll hand populate a couple (total prototype FAB run will ~5 boards) and test them 
out.  I’ll be using my 11/34, 11/40 and possibly my 11/20 for testing these so there should be
pretty good coverage.

I should know pretty quickly after I’ve started debugging the prototypes what the price will be
for the assembled & tested boards.  I’ll start taking orders then.

I’ve also decided that the Unibus interface IC’s will be socketed (mainly I don’t want to deal
with the “wastage” from the assembly house for NLA parts).  It also means that if some of
my stock don’t work, it’s an “easy” fix.  For those that care, I’ll be using machined pin
sockets (gold plated of course).  Any for any that ask, no I will *not* be making the boards
available without the drivers.  I’ll be providing fully assembled and tested boards.

TTFN - Guy