PDP-6s at MIT

Noel Chiappa jnc at mercury.lcs.mit.edu
Fri Dec 16 10:34:17 CST 2016

    > From: Lars Brinkhoff

    > I wonder how the AI PDP-6 was used back in the day.  I suppose ITS
    > development moved to the KA10 using the virtual memory pager, leaving
    > the 6 behind.  But it was still attached as a slave CPU, right?

Yes. There is a document, "February 1972 ITS Status Report", AIM-238, which is
from a point in time when both CPUs were in operation as a dual-CPU system,
with paging on the KA10, and it contains a considerable amount of technical
detail. It is available here:


as a scan, and someone has recently OCR'd it, here:


The section you probably find most interesting is "Dual Processors" (pg. 29),
which describes the unified, shared I/O bus.

The earlier "ITS 1.5 Status Manual" might also be interesting; it covers a
point in time when I think they only had a PDP-6.

    >> I think all the DM people are still around - why not ask one of them
    >> for more?

    > I will.

I'd be interested to hear anything about the DM PDP-6 which you find out.

Ideally it would be optimal to load any information into the Computer History
Wiki, but alas, creation of new accounts on that seems to be wedged at the
moment; I'm working on trying to get that solved.


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