PDP-8 diagnostics SR settings?

[Charles]

Johnny, I appreciate the thought, but there are over 1500 pins on this board 
and soldering them all would be a major undertaking in itself... I don't 
have a wave soldering machine ;)

The first error flagged today is on D1 CA 3, the Command Register A bit 3. 
Scope loops definitely identify this bus as trouble and it's part of the 
disk address register too.
The command register is two 'LS174 hex D-flops, and it drives the input of a 
'165 shift register (disk address) and the input of an 8234 (2-1 
multiplexer/driver) back onto the data bus, and that's it. Should be 
simple... ha!

The voltage on that output pin will go up and down as set by the loop until 
the board is flexed - then it will wander up to around 1-2 volts (measured 
at the pin with a DIP clip).
However, I measured its ability to drive a 510 ohm load to 3.5 volts, and 
sink at least 10 ma (measured directly) staying below 0.8 volts. And the 
inputs to those two gates can be pulled to 0 with only a fraction of a 
milliamp, and go high when the driving D-flop is disconnected! I couldn't 
reproduce the problem while flexing the board either, but then I'd need 
three or four hands.

So I changed the LS174 anyway. No luck - the card passes diagnostics until 
the board is flexed. All three of those chips are in the same general area 
of the board, too.

Close inspection of the driven '165 shows a lot of black oxidation on its 
pins... don't those tend to grow crud inside the package and cause problems 
too?

But... read on ;)

After perusing the schematic several more times this evening, I found one 
more place I'd overlooked where D1 CA 3 (the "flaky" line) connects... to an 
AND gate E96 in the center of the card, that has a solderable jumper for 
RL01/02. I had moved that jumper to RL01 for testing by another member (as 
that is the drive he has), and back to RL02 when I got the card back from 
him.

Lo and behold, underneath that piece of wire was a tiny solder whisker, at 
the moment shorting the CA 3 line to (something else?) but it was definitely 
continuity to another trace.
Don't know how long that whisker might have been there, quite possibly from 
before I changed it for the test!

Anyway I cleared it, and I've flexed the board numerous times while running 
AJRLAC controller diagnostic, and made 8 passes without an error. So far so 
good.

So I connected the drives, booted up SerialDisk and can read their 
directories (only C & D, but that's a PIP version problem that I corrected 
on my RL02 image).

Drives seem to be working :) ... of course R20A: (the SYS directory) is 
clobbered, so I'll have to remake the pack with my known-good image, but I 
was able to format the pack in Drive 1 without errors. Even wiggling the 
board several times. Now I'm running read/write tests (AJRLIA.DG) on Drive 
1. No errors so far after two ten-minute passes :)

THIS time maybe I really got it... CA 3 is the 4th bit of course where all 
the problems were occurring. Will let it run for a while longer.

David Gesswein just sent me a version of dumprest for RL that he's just 
written, modified for my Omni-USB port at 40/41.
If that works I'll be able to upload an entire RL02 in about 2 minutes 
instead of 3 hours with vtserver...

-Charles