Project Oberon and OberonStation (resend)

[Mouse]

> The new version runs on a custom RISC processor, implemented in an FPGA, ins$

Is the FPGA documented?  Or is it yet another "run this binary-only
(and usually Windows-only) program to get an undocumented blob to feed
to the hardware" FPGA?  I've been semi-looking for the former for quite
some time, to no avail so far.

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