8257 use in Intel MDS IOC

Eric Smith spacewar at gmail.com
Sat May 2 23:28:25 CDT 2015

I'm reverse-engineering the firmware of the IOC board of an Intel MDS
Series II (with the iMDX 511 IOC firmware enhancement kit, so it's the
same as early MDS Series III firmware, but possibly not 100% identical
to firmware of the later MDS Series III using the IOC-III).

The IOC uses an 8257 DMA controller, which was the predecessor of the
8237 as used in PCs. While it is mostly pin-compatible, the 8257
register map is a subset of nor compatible with the 8237. Not a
problem since the 8257 datasheet is readily available.


The 8257 mode register (output) and status register (input) are
register number 0x8 of 16. The data sheet says that A3 should be 1 and
A2..A0 should be zero to access those registers, as expected, and does
not document what (if anything) registers 0x9 through 0xf do. It's
possible that they simply mirror register 0x8.

In the MDS, the 8257 is I/O ports 0xf0 through 0xff, so mode and
status should be at 0xf8, and indeed sometimes the firmware references
those. However, the firmware also inputs from 0xfd, and writes to
registers 0xfb, 0xfc, and 0xff.  The values read and written don't
seem to me to completely make sense if I make the assumption that they
are mirrors of 0xf8, and I can't imagine why the firmware author would
have used 0xf8 in some places and other port addresses in other places
if in fact they are functionally the same.

Intel published the source code of the ROMs for the MDS main processor
(8080 or 8085), but I've never seen source code for the IOC firmware.

Update as I was writing this up:

I just spotted a comment in the MESS driver by fulivi stating that
port 0xfd reads as 0xff and is used to detect whether the chip is an
8237 or 8257. If so, perhaps the 8257 either ignores input requests
from 0xf9 through 0xff, leaving the bus tri-state, or possibly it
actually drives 0xff, and perhaps it ignores writes to 0xf9 through
0xff. I'll have to go back through the disassembly and study what that
would do; it didn't seem like just the writes to 0xf8 made sense, but
the other writes may have confused me.

Has anyone actually seen a Series II or Series III with an 8237 on the
IOC board? Perhaps the IOC-III uses the 8237?


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