Qbus split I&D?

[Paul Koning]

> On Mar 18, 2015, at 2:07 PM, Johnny Billquist <bqt at Update.UU.SE> wrote:
> 
> On 2015-03-18 16:28, Paul Koning wrote:
>> 
>>> So what happens if one does a reference to something in the range 17 000 000
>>> to 17 757 777 on the 11/84? The 11/84 _does_ support having memory on the
>>> UNIBUS (up to 248KB), _but_ how it appears depends on how much there is. (See
>>> section 3.13.2, EK-1184-TM-PR2.) There's a special register to configure it
>>> (the 'KTJ11-B Memory Configuration Register', KMCR), which includes _how
>>> much_ UNIBUS memory there is.
>>> ...
>>> Basically, it seems like DEC was determined not to waste any address space on
>>> the J-11/UNIBUS machines. Either it's configured as UNIBUS memory, or it's
>>> PMI.
>> 
>> Interesting.  I was referring to what I learned by reading the RSTS/E memory size determination code.  That code says that the main memory limit is 2M - 128kW for 11/44 and 11/70, and 2M - 4kW for J-11 Unibus.  So it looks like RSTS/E doesn’t support the mixed case you mentioned, only the “just PMI” flavor.
> 
> I'm not sure RSTS/E needs to explicitly know if there are Unibus memory, except if you end of with non-contiguous memory because of this.

RSTS doesn’t need to know, and it actually supports non-contiguous memory (it looks for memory at every 1k address, until it hits the top of the address space it is told to use for the given processor model).  But apparently the decision was not to support Unibus memory in 22 bit systems, since the scan stops at the top of the main memory address space.  Given that it goes all the way to the 4k I/O page on J-11 systems, that would allow it to recognize Unibus memory if any were there, but whether the RSTS team would consider such a config unsupported is a question I no longer know how to answer.

	paul