Qbus split I&D?

[Eric Smith]

On Tue, Mar 17, 2015 at 2:04 PM, John Wilson <wilson at dbit.com> wrote:
> On Tue, Mar 17, 2015 at 12:39:21PM -0700, Guy Sotomayor wrote:
>>The parts that I've been looking at have unlimited write endurance and >20
>>year data retention.
>
> I'd be slightly worried that there are conditions being assumed here, even
> if the MRAM data sheet doesn't seem to say so.  F-RAM claimed unlimited
> writes, but under slightly cherry-picked conditions that might be exceeded
> after all.

The Ramtron FRAM data sheets always gave the actual endurance, which
on 3.3V parts was typically 10^14 cycles, and applied to both read and
write cycles.

MRAM works by an entirely different principle, and neither read nor
write cycles cause any significant physical or chemical stress, so the
endurance is as close to unlimited as makes no difference. The part
will wear out for other reasons before it wears out due to too many
accesses.