What was a Terminal Concentration Device in DEC's products?

[Glen Slick]

http://www.bitsavers.org/pdf/dec/qbus/EK-DHQ11-UG-002.pdf
DHQ11 User Guide, EK-DHQ11-UG.002

The main application of the M3107 DHQ11 is for interactive terminal
handling; it can also be used for data concentration and real-time
processing. It has two programming modes, DHV11 and DHU11. The
register sets in these modes are compatible with those of the DHV11
and DHU11 respectively. The preferred mode of operation is DHU11 mode.
The main features of the DHQ11 are:

• For transmission: DMA transfers; or for each line, program transfers
to a 1 character transmit buffer in DHV11 mode, or to a 64-character
transmit FIFO in DHU11 mode

• For receive: a 256-entry FIFO buffer for received characters,
dataset status changes, and diagnostic information

The M3118 CXA16 and the M3119 CXA08 have the same programming
interface as  the M3107 DHQ11


The M3108 DSV11 can do DMA transfers in both directions, although it
is a synchronous interface, not asynchronous.

http://www.bitsavers.org/pdf/dec/qbus/EK-DSV11-TM-001_Jan87.pdf
DSV11 Technical Manual, EK-DSV11-TM-001

Functional Description (Section 1.5). The DSV11 supports a range of
synchronous protocols on the serial interface, and transfers data to
and from the host by DMA transfer. This section describes the way in
which the DSV11 handles data.

On Sat, Jan 29, 2022 at 3:49 PM Chris Zach via cctalk
<cctalk at classiccmp.org> wrote:
>
> Maybe that is the dhv11. Or the dv11 I'll look it up tomorrow
>
> On January 29, 2022 5:12:41 PM EST, Paul Koning via cctalk <cctalk at classiccmp.org> wrote:
> >
> >
> >> On Jan 29, 2022, at 3:58 PM, Noel Chiappa via cctalk <cctalk at classiccmp.org> wrote:
> >>
> >>> From: Paul Koning
> >>
> >>> DH-11 is unusual in that it has DMA in both directions
> >>
> >> McNamara's DH11? (I don't know of another DECdevice of that name.) Per:
> >>
> >>  http://www.bitsavers.org/pdf/dec/unibus/EK-ODH11-OP-002_DH11_Asynchronous_16-line_Multiplexer_Users_Manual_Sep76.pdf
> >>
> >> it's DMA on output only; the input side has a FIFO that has to be emptied by the CPU.
> >
> >Oh.  That's amazing, all these years I thought it had DMA both ways.  Clearly not.  I wonder how I got that misunderstanding.
> >
> >       paul