Looking for info on memory
Nigel Johnson Ham
g4ajq1 at gmail.com
Wed Oct 20 19:10:01 CDT 2021
Thanks for that, but unfortunately it is crashing into ODT and not
accepting input from the console, which I remember was a symptom of no
bank 0 memory.
Now,of course, it could be the receiver chip in the J board (I used to
make a lot of money changing them ) but I have tried two separate J boards.
Of course if it is 4 MB, it must be in bank zero.
cheers,
Nigel
On 2021-10-20 7:43 p.m., Jerry Weiss via cctech wrote:
> On 10/20/21 12:27 PM, Douglas Taylor via cctech wrote:
>> On 10/19/2021 12:57 PM, Nigel Johnson Ham via cctech wrote:
>>> I am trying to bring up an 11/23 system in a BA23 box, and the only
>>> memory i have is an obscure Plessey one. The only identification is the
>>> p/n 705920 with dash-100 in white ink. By counting the chips I make it
>>> 4MB, but it does not respond. Since it takes the full 22-bit memory
>>> space I can't see how any jumpers would change its accessibility. Does
>>> anybody have a manual?
>>>
>>> any help appreciated,
>>>
>>> Nigel Johnson
>>>
>> Looking at the photo I began to wonder if Plessey made their own
>> boards or are they re-badged from some other manufacturer. I don't
>> know. If they are made by someone else, you might be able to dig up
>> a manual.
>>
>> Also, if you look at the documentation for other 4MB qbus memories
>> how many jumpers do they have? And what do they do? It may help you
>> understand your board.
>>
>> Doug (of course I don't have a 4MB qbus memory, but that apparently
>> didn't stop me from posting.)
>>
> Looking at the silk screening, there is a Plessey logo so this is
> mostly likely there own design. Given the date on warranty I would
> expect jumpers for 18/22 bus type, perhaps battery backup, parity CSR,
> memory chip size, I/O page size,etc... But assuming the jumpers for
> memory address start and length are in some functional configuration,
> you should to poke/read ODT somewhere in the 4MByte addressing
> range. You might also try to see you can read default parity CSR
> for memory boards. The logic (and some circuity) for I/O page should
> be different than memory decoding.
> Suggest you obtain a another memory board (e.g. M8044) to verify the
> other components.
>
>
> Jerry
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