Extremely CISC instructions

Eric Smith spacewar at gmail.com
Wed Aug 25 14:43:45 CDT 2021

On Wed, Aug 25, 2021, 09:50 ben via cctalk <cctalk at classiccmp.org> wrote:

> On 2021-08-25 1:25 a.m., Eric Smith via cctalk wrote:
> >
> > 432 GDP instructions were bit-aligned in an instruction object, and
> > occupied anywhere from 6 to 344 bits.
> Did not the IBM 7030 try a similar idea.
> All this work to replace a punched card.
> Funny how records where simple on decimal computers
> and are mess on binary ones.

The IBM 7030 "Stretch" and the TI TMS34010 and 34020 processors support
integer data on arbitrary (unaligned) bit boundaries, but instructions and
floating point data are required to be aligned.

The 432 GDP uses unaligned, variable bit length instructions, but requires
data to be byte-aligned, and access descriptors (which are object pointers
and capabilities) to be 32-bit aligned

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