(V)HDL Toolsets

[David Bridgham]

On 5/20/20 10:22 PM, Jay Jaeger via cctech wrote:
> I'd be interesting in hearing from folks what toolsets they have used
> for HDL (VHDL in particular).


I've been using Verilog rather than VHDL but I started with Quartus for
a little while then moved over to Vivado which I like a little better. 
I agree with Peter's point that I sure wish the bitstreams were open so
that a crop of open-source tools could be developed and we'd have a bit
more choice.  Along these lines, I've been wondering if I ought to take
a closer look at SymbiFlow, but I have digressed.

What I really use more often though is the Icarus Verilog simulator. 
Besides Verilog testbenches, I've been running the PDP-10 diagnostics
under Icarus.  I even wrote a PDP-10 disassembler in Verilog so it
disassembles and prints out the instructions as it executes them.

I also came across Verilator, a Verilog to C++ compiler.  It makes for
faster running simulations but so far I'm only using it for its 'lint'
function which is pretty nice.  It catches logic loops that just put
Icarus into infinite loops.