(V)HDL Toolsets

[Jay Jaeger]

On 5/21/2020 11:07 AM, Jon Elson wrote:
> On 05/20/2020 09:22 PM, Jay Jaeger via cctalk wrote:
>> As I wrote in my last post, but write here for use as a separate thread:
>>
>> I'd be interesting in hearing from folks what toolsets they have used
>> for HDL (VHDL in particular).  I started with Xilinx ISE and then
>> graduated to Vivado for later chipsets - unfortunately, Vivado seems to
>> be something of a dog, in terms of time to compile HDL and synthesize
>> logic.
> Well, I don't use the latest, super fast FPGAs, I go for old standards
> that are cheap.
> Right now, I have ise 13.4 installed on Linux, it seems to be stable,
> quite fast for the small FPGAs
> I do, and doesn't complain about my coding style.  I use mostly Spartan
> 3 in the
> XC3S50A(N)  sizes.  I've done some units with 32-bit counters running at
> 150 MHz with plenty
> of margin left, that's fast enough for me.  I only use VHDL, although I
> can read Verilog.
> (I also use Coolrunner II and XC9500XL devices in some of my products.)
> 
> Jon

Yes, ISE was much better than Vivado, but doesn't support the chip on my
Nexys4 Xilink development board.  I do have ISE running with the
requisite DLL fixup.

JRJ