HP9816 PAL16L8

[dwight]

I realize that most are familiar with using the equations to create the PALs but I'm a circuit person more than an equation person for circuits. When I needed to create a PAL from a schematic, I first made a schematic of what the PAL was suppose to do, using the same basic model of logic that the PAL provided. Once I was done, I took the PAL map from the TI book and made red dots on each of the connections I needed. I'd then go back and add the don't care connections. You know, A*A!. I transposed them to a text file in the JEDEC format ( One needs to add on non-text character as I recall ) I then gave the file to my friend that had a PAL programmer and made the PAL. I made a simple ruler to convert dot locations to column offsets.
While, Most seem to like the algebraic formulas, I find it harder to check than a schematic.
I had one value that I wasn't sure about that require an experimental PAL blown, as the circuit didn't show if the bank select was 0 or 1 at reset.
I've used this method on both the recreation of Jef Raskin's Swyft board and the PAL I needed for my 6532 to 6530 KIM-1 fix ( the KIM took a couple more PALs because as a human, I made some logic mistakes ).
Copying a L type PAL is a little simpler but in the case of the Swyft board it was a R type PAL. Doing it from the schematic, and know what it was suppose to do was much simpler than trying every possible combination of clock and data from the pins of a PAL ( that I didn't have anyway ).
Dwight

________________________________
From: cctalk <cctalk-bounces at classiccmp.org> on behalf of Paul Berger via cctalk <cctalk at classiccmp.org>
Sent: Tuesday, June 11, 2019 5:54 AM
To: cctalk at classiccmp.org
Subject: Re: HP9816 PAL16L8


On 2019-06-11 1:19 a.m., Chuck Guzis via cctalk wrote:
> On 6/10/19 8:44 PM, Tony Duell via cctalk wrote:
>
>> You can detect sequential logic in the PAL by :
>>
>> For each combination of inputs :
>>     Read the outputs
>>       Toggle an input (change from 0 to 1 and back again or vice versa)
>>       Compare the outputs to what they were before -- if they have
>> changed then there's a sequential function on that input
>>       Check the next input
>>    Check the next combination of inputs
> For purely combinatorial PLDs, see my blog entry on the subject over at
> vcfed.org; I did the work to clone a few PALs some years ago and
> documented the process.
>
> FWIW, the setup to do this was a few TTL ICs connected to the parallel
> port of a PC.   Nowadays, I'd probably do the same with an inexpensive
> MCU--the programmable nature of MCU pins lends a certain amount of
> flexibility to the process.
>
> Basically, you separate the inputs from the outputs and then run all
> combinations of the inputs, observing the outputs.   If the tristate
> feature is used on outputs, there's a way to discover the difference
> between a tristated pin and a genuine input.
>
> There are a number of tools to perform reduction on the results, such as
> Logic Friday.   After that, you're left with a bunch of logic equations
> that can be fed into a PAL/GAL assembler and programmed.
>
> --Chuck

Old computer work too, I used a GPIO in a HP 9000-332.  Years ago I also
created general purpose I/O ports for a PC using 6821 chips since they
are way more flexible that the Intel  8255, but the HP 9000 coupled with
RMB makes for a great environment to bang out quick programs to do
things like this.

Paul.