PDP-11/45 RSTS/E boot problem

[Paul Koning]

> On Jan 20, 2019, at 4:29 PM, Noel Chiappa via cctalk <cctalk at classiccmp.org> wrote:
> 
>> From: Paul Koning
> 
>> It checks if the bits 007750 are active in the parity CSR, if so it
>> takes that to be an address/ECC parity CSR.
> 
> That's odd; those are the 'error address' bits. Maybe there's an assumption
> that the sweep of memory to size it will have caused a parity error from
> garbage in DRAM at startup? (If so, I wonder if it would work on a machine
> with all core? :-)

No, what I meant is that it distinguishes between parity memory that reports the failing address, vs. parity memory that only reports there is something wrong.  To do that, it tests whether those bits exist.  If yes, then this is "address" type parity memory.

	paul