Datasheet for a NEC Chip in DEC Professional 350

[Bill Degnan]

There was a NEC CPU upgrade kit, one used to replace the stock CPU, is this
what you're talking about here?  If so, I believe there was a battery that
went with the chip.  If the battery is dead the chip would not work.  Or am
I totally remember this wrong?
b

On Sun, Nov 4, 2018 at 4:36 PM Ed C. via cctalk <cctalk at classiccmp.org>
wrote:

> Just had a look to this manual:
>
> http://www.bitsavers.org/pdf/dec/pdp11/pro3xx/EK-PC350-TM-001_Professional_300_Series_Technical_Manual_Dec82.pdf
>
> 5.2.3.4 Power-Up Self-Tests, this section mentions the existence of rom
> containing basic power up tests. I assume you are not even getting there
> and your system fails to execute from this rom and report any errors on
> screen?
>
> In such case, A) is your cpu working? B) Is the rom code correct?
>
>
> On Sun, Nov 4, 2018 at 10:11 PM Rob Jarratt <robert.jarratt at ntlworld.com>
> wrote:
>
> >
> >
> > > -----Original Message-----
> > > From: Eduardo Cruz [mailto:edcross at gmail.com]
> > > Sent: 04 November 2018 13:47
> > > To: rob at jarratt.me.uk; Rob Jarratt <robert.jarratt at ntlworld.com>;
> > General
> > > Discussion: On-Topic and Off-Topic Posts <cctalk at classiccmp.org>
> > > Cc: Tony Duell <ard.p850ug1 at gmail.com>
> > > Subject: Re: Datasheet for a NEC Chip in DEC Professional 350
> > >
> > > A constant pulsing reset is usually a watchdog at play. Hardware
> > watchdogs
> > > are usually implemented in systems to reset everything should the
> system
> > > not meet one specific criteria: eg cpu touch one memory address before
> X
> > > amount of time, or pcb voltage lower than X volts, etc.
> > >
> > > Watchdogs are also usually found as software routines executed by the
> cpu
> > > also looking for specific conditions. These rarely issue a reset
> hardware
> > signal,
> > > just restar the program.
> > >
> >
> > It looks to me like the reset is every 10us. I don't know how long the
> > watchdog is likely to be, the technical manual I have doesn't seem to
> > mention it in the section on the reset logic. I am still trying to find
> the
> > source of the signal that seems to be in the "wrong" state.
> >
> > Regards
> >
> > Rob
> >
> >
>