Firefly dual processor card

[Mark Kahrs]

Against my better judgement, I obtained a DEC SRC Firefly dual processor
card.  If i read this* correctly, then this card is interfaced to the
shared memory bus (MBUS) as opposed to the QBUS (the card uses a Q bus
format).

I realize it's probably hopeless, but I'll ask anyway: Are there any
schematics or specifications on the connectors anywhere?

*IEEE Computer, also available on Bitsavers as a technical report.