DEC bus transceivers

[David Bridgham]

On 10/24/2016 12:01 PM, Paul Koning wrote:

> I don't know about the receiver part, but I'd expect that the drivers could very easily be done with a simple transistor circuit.

Agreed.  However ...

> As for slew rates, unless you have antique transistors, that's not going to be an issue given that you meet the current sink spec; the slew rate of an OC circuit is determined by the system capacitance and the sink current of the driver.

I think you read this part backwards.  The slew rate requirement is not
a minimum slew rate but a maximum one.  That is, any modern transistor
(probably ancient ones too) will be way too fast.  You have to do
something to slow it down.  Still, I think this one is easily met as
it's just a series resistor on the gate of the driver MOSFET working
against the gate capacitance.  Some FPGAs have current limiting on their
output which may obviate the need for the resistor even.

The receiver though, that one takes a little more thought.