Front panel switches - what did they do?

Brent Hilpert hilpert at cs.ubc.ca
Wed May 25 14:23:24 CDT 2016


On 2016-May-24, at 5:30 PM, Eric Smith wrote:
> On Tue, May 24, 2016 at 3:09 PM, Brent Hilpert <hilpert at cs.ubc.ca> wrote:
>> Yes, I examined this in some detail last year after mention on the list, and wrote it up:
>>        http://www.cs.ubc.ca/~hilpert/e/corerope/index.html
> 
> That's a great write-up! Thanks!

Thanks, I had been perplexed by the descriptions of the AGC ROM available in the usual places (the AGC books), they gloss over aspects or in some cases are inaccurate, and once looking into the AGC ROM in detail realised they were (at least) two techniques being used in woven-wire/transformer ROMs.


> I'm not sure about how IBM TROS was driven, but the core-rope memory
> I've examined was not from an AGC and didn't use the switching core
> technique, so I wouldn't consider that decode technique to be an
> inherent property of core rope memory, although it's certainly clever.

I think this just goes to the etymology of the phrase "core rope" - whether one chooses to apply the term only to the switching-core technique (where I believe it originated), or generally to woven-wire ROMS which take on the appearance of a rope (which seems to be the common use these days).

It appears the switching-core ROM technique was a practical application or outcome of the more-general "magnetic core logic" technology of the 50's.


> The core rope memory I examined had 64 words. Of the six address
> lines, three fed a three-to-eight decoder with high-side drivers, and
> the other three fed a three-to-eight decoder with low-side drivers.
> Each of the 64 word drive lines was wired between a unqiue pair of
> high-side and low-side drivers. That required significantly less
> circuitry than a single-ended six-to-64 decoder.
> 
> The same technique was used for the X drive and Y drive of "normal"
> core memory, such as the PDP-1 drivers for the Fabritek 4K planes in
> the PDP-1 at CHM. (There was an earlier model of PDP-1 core memory
> that might have used a different drive scheme.)  The X drive used one
> pair of eight each high and low side drivers, and the Y drive used
> another such pair.



More information about the cctalk mailing list