CDC 6600 emulation - was Re: How do they make Verilog code for unknown ICs?

[Chuck Guzis]

On 06/21/2016 08:35 AM, Paul Koning wrote:

> There are block diagrams, and those will have to serve if all else
> fails, but that means reverse engineering the module level detail
> (or, more precisely, constructing a functionally equivalent set of
> module level details).  I keep hoping that some day the missing
> details will be found.  Similarly, there are some other details that
> are missing; the PPU wire lists predate the central/monitor exchange
> jump feature so that too would have to be reconstructed from less
> detailed information.

Wasn't CEJ/MEJ a field-installable ECO?   Maybe there's paper on that
somewhere.

ECS to me would be the real bugger, since it isn't just a box of core
sitting off to the side.  On the Cybers, didn't it also include the ILR?
 That was too many years ago.  I do remember that it made the business
of RCH/DCH much simpler in PPRES--no need to go through MTR.

Well, when you're done with the 6600, you can work up a STAR 100 :)  I'm
not aware of even a software emulator being available for that one.

--Chuck