How do they make Verilog code for unknown ICs?

[Guy Sotomayor Jr]

Most of the FPGA companies provide (free) tools that allow you to write in
verilog/VHDL and then simulate and observe the outputs (you can even “drill
down” and see internal signals as well.

It’s fairly easy to write a little bit of code (there are lots of examples on the
web) and try it out on the simulator.

If you get an FPGA eval board (I have a number of Digilent Xilinx boards)
you can take your sample code and download it to the eval board and run it.

TTFN - Guy

> On Jun 20, 2016, at 1:47 PM, Swift Griggs <swiftgriggs at gmail.com> wrote:
> 
> On Mon, 20 Jun 2016, Ian Finder wrote:
>> Some PALs, PLAs, and GALs will yield the fuse map if you try and read them
>> with a programmer. This makes your job really easy. Take the fuse map and
>> compare to the original data sheet. Cool beans.
> 
> That sounds like magic. I'm reading about what "fuse map" is, now. That's 
> a new term for me. 
> 
>> Some have the security bits set- in this case you would use a home-made 
>> test setup to stimulate enough test conditions to build a truth table 
>> that would allow you to infer the underlying logic.
> 
> Hmm, so there is something akin to "copy protection" even at the chip 
> level. Ugh. I'm not surprised.
> 
>> If the part is registered, then things get tricker. For that, I might 
>> take substantial in-system dumps with a logic analyzer (My favorite 
>> beginner LA is the Agilent 16700, which comes with DOOM preinstalled, so 
>> you know it's good stuff)
> 
> Oh, cool. I was just browsing for one a few days ago. I was looking at the 
> ones from Saleae and Tektronix. I'll have to check that out. If they were 
> cool enough to pre-install Doom, I think we have a winner. :-)
> 
>> ROMS are easy- once you read a bit about how HDLs work, you will be able 
>> to build one. Many languages offer functions to help with these (see 
>> readmemh and readmemb in verilog)
> 
> I actually did burn some ROM code in college. I remember it being fairly 
> easy. However, I would look like a stunned fish if someone asked me to 
> reverse engineer one.
> 
>> Things get more complicated quickly- this is a deep topic and not 
>> something that can be covered quickly. I suggest you start with the two 
>> books I linked, and if you like them, there are a lot more around. Any 
>> edition should be suitable- get or find whatever is cheapest.
> 
> Oh good lord, I'm so out of my depth already. However, it's still 
> interesting and I'm still trying (I'm stubborn that way). I've got to get 
> the simplest basics down before I dive in all the way with a "real" book. 
> I'm going to try to stick with my digital logic self-refresh first, but 
> this Verilog business is awfully cool. I will be sorely tempted to come 
> back to this same point, I'm sure.
> 
>> We have not touched yet on practical things, like how to interface 
>> modern 1.8v FPGA I/O lines with 5V TTL logic- that is a topic for 
>> another day.
> 
> Hmm, I never even knew of that problem, but after doing a bunch of analog, 
> I get the impression that would create a lot of hassles, especially if you 
> were just trying to duplicate some already laid-out logic, but it was all 
> at 5V... 
> 
> -Swift