How do they make Verilog code for unknown ICs?

Ian Finder ian.finder at gmail.com
Mon Jun 20 15:17:35 CDT 2016


To expand on my response-

Some PALs, PLAs, and GALs will yield the fuse map if you try and read them
with a programmer. This makes your job really easy. Take the fuse map and
compare to the original data sheet. Cool beans.
Some have the security bits set- in this case you would use a home-made
test setup to stimulate enough test conditions to build a truth table that
would allow you to infer the underlying logic.

If the part is registered, then things get tricker. For that, I might take
substantial in-system dumps with a logic analyzer (My favorite beginner LA
is the Agilent 16700, which comes with DOOM preinstalled, so you know it's
good stuff)

ROMS are easy- once you read a bit about how HDLs work, you will be able to
build one. Many languages offer functions to help with these (see readmemh
and readmemb in verilog)

Things get more complicated quickly- this is a deep topic and not something
that can be covered quickly. I suggest you start with the two books I
linked, and if you like them, there are a lot more around. Any edition
should be suitable- get or find whatever is cheapest.

We have not touched yet on practical things, like how to interface modern
1.8v FPGA I/O lines with 5V TTL logic- that is a topic for another day.

Cheers,

- Ian

On Mon, Jun 20, 2016 at 1:07 PM, Ian Finder <ian.finder at gmail.com> wrote:

> The hardest part of the process is distilling the functional specification
> of the part you are trying to replace. This is the heart of the topic. Some
> ways this can be done:
> > If adequate documentation exists, use it.
> > Observe the part's behavior in-system
> > Build a test bench to observe behavior of part outside of system
> > General leetness
>
> There is no one approach, it is more art than science.
>
> For going from a functional specification to a synthesizable model, this
> is simply writing HDL.
> I suggest this book, which covers the basics of this process.
>
> https://www.amazon.com/Verilog-Digital-System-Design-Verification/dp/0071445641
>
> If you have no 100-level understanding of digital logic, start here:
> https://www.amazon.com/Contemporary-Logic-Design-Randy-Katz/dp/0201308576
>
> Thanks,
>
> - Ian
>
>
>
>
>
> On Mon, Jun 20, 2016 at 1:02 PM, Toby Thain <toby at telegraphics.com.au>
> wrote:
>
>> On 2016-06-20 3:35 PM, Swift Griggs wrote:
>>
>>>
>>> In my recent studies of electronics (I'm a noob for all practical
>>> purposes) I keep seeing folks refer to Verilog almost as a verb. I read
>>> about it in Wikipedia and it sounds pretty interesting. It's basically
>>> described as a coding scheme for electronics, similar to programming but
>>> with extras like signal strength and propagation included. Hey, cool!
>>>
>>> Why are folks referring to "Verilogging" and "doing a verilog" on older
>>> chips. Is there some way you can stuff an IC into a socket or alligator
>>> clip a bunch of tiny leads onto it and then "map" it somehow into
>>> Verilog?
>>> Is that what folks who write emulators do?
>>>
>>
>> They firstly go by documentation, and if that fails, reverse engineer,
>> painfully. This is why preserving, archiving, publishing documentation is
>> so incredibly important!
>>
>> > Ie.. they exhaustively dump
>>
>>> Verilog code for all the chips then figure out how to implement that in
>>>
>>
>> You can't in general get Verilog *out* of a chip. It goes the other way.
>> You can compile Verilog into gates and netlists etc.
>>
>> some computer programming language like C ? What do folks do for ROM chips
>>> and PLCs? I'd think they must dump the code and disassemble it. No?
>>>
>>
>> Yes, they do that where possible.
>>
>>
>>> I'm just curious and this is a tough question to answer with Google since
>>> I'm pretty clueless and don't know the right words to search for. I
>>> notice
>>>
>>
>> You can google "EDA tools". You can also grab toolchains from major
>> vendors like Altera and play with Verilog/VHDL and simulate the results,
>> too.
>>
>> people talk about correcting their Verilog code, so it must be somewhat of
>>> a manual process. I'm just wondering how someone even gets started with a
>>> process like that.
>>>
>>
>> I'd suggest hitting some textbooks, not Google.
>>
>> Niklaus Wirth's book is fantastic, for people more comfortable in
>> software, if you take it step by step:
>>
>>
>> https://www.amazon.ca/Digital-Circuit-Computer-Science-Students/dp/354058577X
>>
>> --Toby
>>
>>
>>> -Swift
>>>
>>>
>>
>
>
> --
>    Ian Finder
>    (206) 395-MIPS
>    ian.finder at gmail.com
>



-- 
   Ian Finder
   (206) 395-MIPS
   ian.finder at gmail.com


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