Reproduction micros

[Paul Koning]

> On Jul 20, 2016, at 6:28 PM, Pete Turnbull <pete at dunnington.plus.com> wrote:
> 
> On 20/07/2016 20:29, Paul Koning wrote:
> 
>> I don't remember the earlier ARM designs, but it was my impression
>> that DEC's StrongARM was the one that made really large strides in
>> low power (especially power per MHz of clock speed).  Interestingly
>> enough, StrongARM was one of the few (and the first?) independent
>> designs; it used the ARM architecture specification but not the
>> actual logic design as others did.
> 
> That's almost right.  An ARM2 dissipates less than 2W (according to my data sheet, but that's maximum allowed dissipation and I think typical consumption is much less than 1W) with its normal 5V supply, averaging some 6-8 MIPS with a 12MHZ clock.  It's a 2micron CMOS process.  The original ARM used a 3micron process but was only used for testing and development; I can't remember what ARM3 used but IIRC it was a lot smaller though still the same core design, and it's certainly low power (under 1W) despite having a lot more transistors (largely for cache) and a higher clock speed.
> 
> StrongARM SA-110 uses roughly 450mW, but with Vcc around 1.75V it claimed about 100 MIPS at 100MHz, in a 0.35micron process.  It was a collaboration between ARM and Digital, but AIUI the hardware design was done mainly or perhaps completely by Digital.  Yes, it was the first independent design, as far as I know.  Earliest designs were done by Acorn and later I think by Acorn with VLSI, and ARM with Digital (ARM6/7).  I had access to early SA-110 development stuff for a project in 1996 but I had to go to Digital to get it, not Acorn/ARM.

Thanks for the backup data.  I have the impression that power gating and clock gating (essentially only running small parts of the chip rather than all of it all the time) is one big reason why the SA-110 is so power-efficient.

I still have an SA-110 eval board tucked away in the workshop.

	paul