Reproduction micros

[Liam Proven]

On 19 July 2016 at 17:04, Peter Corlett <abuse at cabal.org.uk> wrote:
> From there, it seems to be saying that the essence of the invention is that the
> ARM ISA is RISC, it is a load-store architecture, and the CPU was pipelined.
>
> RISC implies a load-store architecture, so that claim is redundant.

Could you expand on that, please? I think that IKWYM but I'm not sure.

> Pipelining is an older idea: the 1979-vintage 68000 does it, and the 1982-vintage
> 68010 even detects certain string/loop instructions in its pipeline and avoids
> re-fetching them from memory when repeating the sequence.

I don't think that article or anything else is claiming that ARM
invented RISC, was the first RISC processor, or even significantly
advanced the RISC art.

What is says is that ARM was built by a very small team -- which it
was. That part of that is that Wilson did a lot of the design
single-handed -- which is true.

I don't know about her simulating the design in her head; from what
I've heard from several sources, including Wilson herself in a talk at
ROUGOL, was that the first simulation of the ARM instruction set was a
BBC BASIC program running on a BBC Micro. That in itself is quite
remarkable.

I think it's fair to say that ARM was a relatively early RISC
implementation *in term of single chip processors*, that it was
remarkably simple compared to others of that time (as in, smaller,
more reduced, fewer transistors, etc.), that its power consumption
always was remarkably low and its performance, for its first decade or
so, remarkably high.

> IMO, it's the predicated instructions that is ARM's special sauce and the real
> innovation that gives it a performance boost. Without those, it'd be just a 32
> bit wide 6502 knockoff.

Do tell...?


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