Z-80 code question about a loop that depends on the contents of the refresh register

[allison]

On 12/15/2016 02:12 AM, Ethan Dicks wrote:
> On Wed, Dec 14, 2016 at 2:08 AM, Alexis Kotlowy
> <thrashbarg at kaput.homeunix.org> wrote:
>> On 14/12/2016 09:19, Ethan Dicks wrote:
>>> So far, this loop hangs on all three emulators I've tried - simh's
>>> altairz80, simcpm010 for AmigaDOS, and EMUZ80 for Raspberry Pi...
>> Have you tried running it on ZEMU? (Windows only unfortunately, but
>> should run under WINE).
>>
>> http://www.z80.info/z80emu.htm#EMU_CPU_W32
> Thanks for the tip, Alexis.  It did run under ZEMU under Wine on my
> Mint laptop, but what an awful interface.  My next goal is finding
> something less mousy like fixing altairz80.
>
>> I tried single stepping through it just now and it looks like it's doing
>> its job, at least as a possible random number generator.
> Yep.  No tweaks.  It just ran as expected under ZEMU once I got the
> files in there.
>
>> I can't find any information on what the MSB is set to when the
>> accumulator is loaded with R, and what the Sign flag is set to. The
>> datasheet says the Sign and Zero flags are changed by the instruction.
>> If either of these flags are set, the routine enters an infinite loop.
> The upper bit of R can be set or cleared with LD R,A but won't change
> state due to counter activity.  I checked the program - it only does
> LD A,R to read the register.  It never sets it.
>
> Thanks again for the tip.  Once I get a few more things checked out,
> I'll be revealing what this is all about.  I think a few people may be
> interested, or at least amused.
>
> -ethan
>
In the past the LD A,R  was used to seed a random number generator, not
the best but for
tiny basics and the like is was enough.  IT was used in one app I'd seen
as a cycle
counter as part of a debugger since it increments each M1 (instruction
fetch) cycle.

FYI later Z80 variants like 64180, Z180, Z280 that register was at least
8 bit
incrementing.  I've designed around them all.


Allison