OT: x86 machine code [Was: Re: Self modifying code, lambda calculus - Re: ENIAC programming]

[Dave G4UGM]

> -----Original Message-----
> From: cctalk [mailto:cctalk-bounces at classiccmp.org] On Behalf Of Liam
> Proven
> Sent: 18 September 2015 13:23
> To: General Discussion: On-Topic and Off-Topic Posts
> <cctalk at classiccmp.org>
> Subject: Re: OT: x86 machine code [Was: Re: Self modifying code, lambda
> calculus - Re: ENIAC programming]
> 
> On 18 September 2015 at 13:06, Pontus Pihlgren <pontus at update.uu.se>
> wrote:
> > I've been told this more than a few times and read it in various places.
> > It always make me wonder, could we not allow a mode in modern Intel
> > processors that lets us bypass the x86 code emulation/translation and
> > run "directly on the metal" (if there were such a thing).
> >
> > The purpose, of course, would be to gain performance. Certainly this
> > would already have been done if there was any significant gain to be
> > had?
> 

 Don't know about the Intel chips but the IBM Mainframe chips have an intermediate level of code they call "millicode" as described for example here:-

http://ibmsystemsmag.com/mainframe/administrator/performance/millicode_rogers/

and basically you don't actually want to by-pass this code because by doing so you by-pass the optimisations and so run more slowly....


> I think not, because the "RISC core interpreting x86 instructions" is a fairly
> gross over-simplification, as best as I have been able to determine. Yes, all
> C21 x86 chips borrow lots of design principles from RISC, but they are CISC
> chips executing CISC code -- just doing a lot of fancy on-the-fly optimisations.
> There isn't an underlying separate different microcode.
> 
> That has been done, though. It was the Transmeta Crusoe line of processors.
> 
> These were not directly x86-compatible at all: they had their own instruction
> set, and during boot, loaded a translation layer on top which executed x86
> code via a sort of optimising compiler/interpreter with JIT.
> 
> The purpose was to achieve very low power consumption, for portables.
> The performance was not as good as native x86 even at the time -- although
> nearly -- but the processors used significantly less power.
> 
> They were not RISC, though: they were VLIW underneath.
> 
> I always thought it was *the* critical mistake of Transmeta not to at least
> release the native instruction set. If they could also execute Motorola 680x0
> code, or PowerPC code, or Alpha code, or any other discontinued (or
> effectively discontinued) instruction set, they would still have a market
> today.
> 
> --
> Liam Proven • Profile: http://lproven.livejournal.com/profile
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