Qbus split I&D?

[Johnny Billquist]

On 2015-03-17 13:43, emanuel stiebler wrote:
> On 2015-03-17 13:34, Johnny Billquist wrote:
>> On 2015-03-17 01:10, Eric Smith wrote:
>>> Noel Chiappa wrote:
>
>>> It would probably be difficult or impossible to obtain a PEP70 (with
>>> or without HC70) at this late date. The 11/70 memory bus (between the
>>> CPU and memory box) is quite simple, so it should be very easy for
>>> someone with reasonable hardware expertise to design and build a
>>> modern memory board for it, comparable to the PEP70.
>>
>> I have from time to time played with the thought...
>> An 11/70 with the PEP70/HC70 combo would probably draw the same as an
>> 11/45. And you'd have a much sweeter machine.
>>
> I guess, everybody who has a 11/70 toyed/played with this idea.

Yeah... :-)

> But you need few people who would pitch in to make the boards ...

Making just a replacement for the PEP70 would be easy, I think. Just 
interface the 11/70 memory bus.
The more interesting one would be the HC70 style thing. Make all memory 
work like cache.
That would require ripping out the existing 11/70 cache, and replace 
those boards. Means you need to interface to the whole CPU. But the 
gains would be much larger.
I guess it is possible. You just need to read the 11/70 drawings and 
manuals, to figure out how the cache works and interfaces with the rest 
of the CPU.

I would definitely be interested in helping out, but I do not have 
enough time at the moment to do much of the work myself.

	Johnny