VAX-11/750 memory in 11/70 ?

[Paul Birkel]

Then keep looking (please) ... and thanks for the lucid explanation.
Hadn't previously given any thought to initialization of ECC memory.  Now I
know better!

On Wed, Mar 11, 2015 at 12:37 PM, Johnny Billquist <bqt at update.uu.se> wrote:

> On 2015-03-11 16:53, Paul Birkel wrote:
>
>> Perhaps the Chapters 9/10/11 on Cache, MMU and Unibus Map in
>> KA-K1170-MG-003 are what you're thinking of (somehow ... :->)?
>>
>> http://bitsavers.trailing-edge.com/pdf/dec/pdp11/1170/
>> KA-K1170-MG-003_1170_Maintenance_Service_Guide_Apr88.pdf
>>
>
> Nope. The manual I'm thinking of is for the memory subsystem only. And it
> has a really nice/odd description on how you reach the MK11 CSR, which is
> written in the form of a small adventure story. (Almost)
>
>         Johnny
>
>
>
>> On Wed, Mar 11, 2015 at 11:39 AM, Johnny Billquist <bqt at update.uu.se>
>> wrote:
>>
>>  On 2015-03-11 00:11, Ethan Dicks wrote:
>>>
>>>  On Tue, Mar 10, 2015 at 7:06 PM, Johnny Billquist <bqt at update.uu.se>
>>>> wrote:
>>>>
>>>>  Which one of these, if any, could be used in an 11/70?
>>>>>
>>>>>>
>>>>>>>  And if you absolutely want to use 1M cards in an 11/70, ping me, and
>>>>>>
>>>>> I'll
>>>>> walk you through the howto. (Update have done this in the past. It is
>>>>> not
>>>>> trivial, but it is possible.)
>>>>>
>>>>>
>>>> I have a crate of 256MB RAM on my 11/70s but I'd love to learn what it
>>>> takes to use 1MB boards (which I have a few of from 11/750s and
>>>> 11/730s and 11/725s).  I might decide it's too much trouble, but I'd
>>>> to know what's involved.
>>>>
>>>>
>>> 256K, not 256M, but anyway... :-)
>>>
>>> There are several bits to it.
>>> The MK11 only have 18 address pins on the backplane, which means it
>>> cannot
>>> directly address larger boards. In addition, there are 16 card select
>>> pins.
>>> One for each slot. At power on, the memory controller in the MK11 writes
>>> to
>>> all cards in parallel, in order to initialize the ECC bits on all cards.
>>>
>>> The way you get 1M cards to work is that you need to tie together 4 card
>>> select lines, so that your 1M card would appear to be four 256K cards in
>>> the MK11.
>>>
>>> In addition, you also need to code back from the four select lines into
>>> the two additional address lines.
>>>
>>> This is not so hard. Essentially we're talking about a OR of 4 lines, and
>>> a 4-2 encoder.
>>>
>>> Important additional detail is that you *really* want to make sure that
>>> when all cards are select together, that is equivalent to the lowest
>>> addressed cards.
>>>
>>> So far for the hardware.
>>>
>>> After you've done this, you then also needs to fix a software problem.
>>> Like I said at the start, the MK11 initialize all the ECC of all the
>>> cards,
>>> at initialization time. And it does this in parallel for all cards. That
>>> means all card select lines are active together at initialization. And
>>> then
>>> the address lines runs through address 0-256K doing writes.
>>>
>>> This means that the ECC for 3/4 of a 1M card will not be initialized. The
>>> 1/4 that do get initialized, you want to be the low addresses, since
>>> those
>>> you need before you can really do anything more. Having memory errors for
>>> address 0 is really bad.
>>>
>>> Once you've come this far, you need to write a short program that will
>>> initialize the ECC of the rest of your memory. This can be done through
>>> software, but it requires some tricks. Normal writes of memory expects
>>> the
>>> ECC to already be correct, so you need to turn off ECC checking in the
>>> MK11
>>> before writing to the uninitialized memory. You can turn off ECC checking
>>> in the MK11 by changing a CSR register, where you can set the operation
>>> of
>>> the MK11.
>>> However, there is a problem here. The CSR is in the MK11 box. But the
>>> MK11
>>> box is on the memory bus, and not on the Unibus. And the CSR address is
>>> in
>>> I/O space.
>>> The trick for this is to use the MMU and the Unibus map to get access to
>>> the I/O space on the memory bus.
>>> How this actually is done is hidden deep inside one of the technical
>>> manuals of the 11/70, and in a rather weird form.
>>> I can't seem to find that manual online. It's something like "11/70
>>> memory
>>> subsystem manunal" or something similar. I (Update) have a hardcopy of it
>>> somewhere.
>>>
>>> But the theory of it is not so hard. You access an address in the Unibus
>>> memory address space, using the MMU. The Unibus map then remaps this
>>> address into an address in the I/O space. All access of memory through
>>> the
>>> Unibus map will go to the memory bus.
>>>
>>>          Johnny
>>>
>>>
>>>
>