FPGA tricks - Re: using new technology on old machines. Was: PDP-12 Restoration at the RICM

[ben]

On 6/15/2015 11:33 AM, Paul Koning wrote:
>
>> On Jun 15, 2015, at 1:28 PM, ben <bfranchuk at jetnet.ab.ca> wrote:
>>
>> On 6/15/2015 10:57 AM, Dave G4UGM wrote:
>>> But alas the software does *not* support the older chips.
>>>
>>> How old is old? I managed to get a copy of ISE10.1 downloaded,
>>> installed and running without phoning, ringing or otherwise
>>> jumping through hoops. That supports the Spartan 2 which has been
>>> obsolete for some time..  If you want to play with some Spartan 2
>>> chips contact me off-line.
>>
>> I use the other brand. I also program it in ADHL, that I can
>> understand. I also use crash and burn debugging with paper
>> listings, Ben.
>
> What’s ADHL?  I know VHDL and haven’t yet learned Verilog.  I once
> used an old proprietary CPLD language with Lattice (Lattice-HDL???).
> Very primitive and not particularly easy to use, not to mention too
> limited for anything beyond little CPLDs.
>
That was Altera's programing language. Since I have the hardware here
I have no need to move to anything else. Mind you the hardware docs
are sparse, a few datasheets on the major chips.

> VHDL and Verilog have the benefit of being standards, and at least
> for VHDL there are open source tools available (ghdl) that work
> well.

As soon as you get real hardware, every brand is different.

"The nice thing about standards is that there are so many of them to 
choose from"

> paul
Ben.