MEM11 Update
Guy Sotomayor
ggs at shiresoft.com
Wed Jul 22 11:38:02 CDT 2015
On 7/22/15 7:12 AM, Noel Chiappa wrote:
>
>
> So, I noticed that on some QBUS cards DEC used a quad transceiver with
> tri-state output (on the card side), the AM2908PC. It has separate tri-state
> drive enable, and bus drive enable, pins. The FPGA we were looking at
> supports bi-directional pins (i.e. tri-state output, plus input), so I
> conceived the hack of tying the transceiver's input and output pins together,
> and routing them into bi-directional pins on the FPGA. As long as one doesn't
> turn on the tri-state drive and the QBUS drive enable at the same time
> (forming a feedback loop at the transceiver chip), it _should_ work OK.
> (Mandatory observation about theory and practise included at this point...)
Actually, what I plan on doing (since I need level shifters anyway to go
from 5v to 3.3v I/Os) is
to use tri-state 5v tolerant 3.3v parts that are feeding the FPGA. That
way it's safe to tie the
inputs to outputs since the output (from unibus) is only driven when the
FPGA is expecting an
input and visa-versa.
The thing that really chews up the pins are the bus grants since they
have to be propagated.
So I need 2 pins for each grant line (one for the input and one for the
output). :-(
>
> So that reduces the number of pins needed by half. (Although I guess one
> could pull the same hack with the UNIBUS, _iff_ the 2908 can work as a UNIBUS
> transceiver; analog electrically, the two seem to be pretty identical.)
I haven't looked at the AM2908PC. It wouldn't really affect the FPGA
but it could potentially
simplify the board design (ie use a wide tri-state transceiver to do the
level shifting).
>
> One can further observe that on the QBUS, A and D are shared, so one doesn't
> need separate A and D pins. One cannot do that with the UNIBUS, since they
> way DATO works, the A and D lines have to be driven at the same time (with
> different values, of course).
Yea, you could do that with the FPGA on the unibus but it would require
a set of latches. I'm
trying to keep the external logic on the board to a minimum but it's
something to consider if
I run into pin-count issues.
TTFN - Guy
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