Possible error in "Microcomputers and Memories" (1982 edition)

[Johnny Billquist]

On 2015-02-17 21:35, Noel Chiappa wrote:
> So the description of the SSR3 register in "Microcomputers and Memories"
> (1982), on pg. 284, apparently has an error. It describes bit 5 as "enables
> I/O mapping", but.... the QBUS 11's don't have any kind of I/O mapping that I
> know of. Or am I confused?

If it's the same as MMR3 in "older" CPUs, then yes, bit 5 is for Unibus 
map relocation.

That said, though, there were CPUs that were used in both Qbus and 
Unibus systems, so that bit could still be relevant to the CPU you're 
reading about, depending on in which environment it was used.

	Johnny