Problem with DEC LSI11 / KD11-F

[Mattis Lind]

2014-11-30 2:40 GMT+01:00 Pete Turnbull <pete at dunnington.plus.com>:
>
>
> Does the Service Manual say anything specific about the ROM
> compatibility?  I wonder how important it is to match the ROM set to the
> Vbb value, and to what extent the change was for improved noise immunity or
> longevity.
>
>
> Unfortunately I didn't mention anything about compatibility. Just that a
certain revision also changed what chips were used. It listed the Vbb
voltages for a set off chips. Here is the link to the manual:
https://ia601000.us.archive.org/5/items/bitsavers_decpdp11LSnualAug81_12677441/LSI-11_Systems_Service_Manual_Aug81.pdf


The older make use of -5.1 V substrate bias whilst newer used -3.9V.  I am
not that eager to try to mix the chips between the boards if this would
make them to fail. I cold try to modify the bias circuit. But then it
probably also affects the -5 for the memory chips. It uses MK4096 chips.

My board seems be a etch revision D, and schematic revision H if I read it
correctly. The schematic at bitsavers (
http://www.textfiles.com/bitsavers/pdf/dec/pdp11/1103/1103_Schematics.pdf)
is a revision "Z" and is for the "F" etch revision.

Does anyone have the older schematics for the KD11-F etch revision C or D?