mattislind at gmail.com
Sun Apr 5 19:04:03 CDT 2020
Den sön 5 apr. 2020 kl 22:18 skrev Brent Hilpert via cctalk <
cctalk at classiccmp.org>:
> On 2020-Apr-05, at 6:05 AM, Rob Jarratt via cctalk wrote:
> > I found time to follow Mattis’s suggestion today and I got some
> interesting results.
> > I powered the UC3842 with about 16V from a bench power supply. I lifted
> R32 so that the transformer would not supply it. I then used an isolating
> transformer to power a variac and applied the variac to the AC inlet. I
> also used a load board from a MicroVAX 2000 and an old RD53 disk as the
> load, so there should be enough load.
> > I found that I can vary the AC input up to a maximum of about 40VAC
> before the SCR triggers, the 5V output reaches about 400mV. If I raise the
> AC input more slowly, it will usually cut out before that, around 30VAC. I
> noticed that the inrush thermistors also get quite hot at these low AC
> voltages, I don’t know if this is because of the relatively low AC supply
> voltage, or if this indicates a problem of some kind.
> > The voltage coming out of L3 into the T1 “bounces” somewhat. I guess
> this is because the AC input is only 20V or so, or it may be expected
> ripple from the smoothing capacitors? In the description below, the peaks
> of the bounces are used. Throughout the variation from 0VAC to 40VAC the
> duty cycle of the oscillation of the UC3842 output does not change, I guess
> because the output voltage has not reached its target value.
> > With the AC input at about 25VAC the circuit seems to be stable (apart
> from the bounces mentioned above). At this supply voltage, the voltage at
> the source of Q1 reaches 2V. The current sense resistor is 1 Ohm, which
> means 2A must be flowing through it at that time.
> > When the Q1 source is at 2V, the other end of R14 is at about 0.5V,
> which is just below the trigger voltage for the SCR. This makes sense
> because R14 and R15 form a voltage divider that looks to be nominally 25%
> of the Q1 source. Given the SCR nominally triggers at about 0.8V, this
> means that the current sense resistor is set to trigger the SCR at about
> 2.5A, I think. This would suggest that the duty cycle on Q1 is too high and
> causing too much current to be drawn. So presumably the feedback to the
> UC3842 is not working correctly.
> > I tried setting the AC input at 120V and using a one-shot sample. Q1 is
> switched for about 30ms and then there is a spike on the SCR gate to 2V and
> it triggers. The gate voltage then remains at 1V. However, there is no
> spike across the current sense resistor (R13), so I don’t know if the spike
> is because the SCR is being turned for some other reason. There is nothing
> unusual on the anode of D19 to cause it to trigger due to avalanche
> breakdown. I got the same result when the AC input was 220V. I wonder if
> the SCR is behaving slightly differently because I have lifted R32?
> > Since there might be a feedback problem, I looked at the VFB input to
> the UC3842 when doing a one-shot test at 240VAC. I can see VFB steadily
> rise over the period when Q1 switched, up to a maximum of 4V. I don’t
> really know if this is how it should behave though, but it seems to make
> logical sense. During all that time the duty cycle of Q1 does not change.
> > I am not too sure where to go from here. I hope the above makes sense. I
> would appreciate any further thoughts.
> Switching power supplies are, to coin a phrase, voltage/current-ratio
> power translators.
> They will attempt to adjust the (cycle-averaged) input-current demand in
> inverse proportion to the input voltage, to meet the power demand of the
I am not sure what you mean here. A SMMPS mode chop up the input voltage
and feed it through a transformer. Then it can vary the duty cycle to to
regulate the output voltage in case of load variation or input voltage
> When you load a switching supply, and run it with a low input voltage, it
> will attempt to increase the input-current demand, either with increased
> peak current or increased duty-cycle (ON-time of primary switching
> Suppose you have a load demand of 100W. At 100V input the input current
> needed is 1A.
> At 10V input, the input current needed is 10A.
NO, that is not how it works. I think you are confusing things. All SMPS
has a certain turn ratio. There is nothing magic with a SMPS PSU rather
than a normal iron core transformer. It does transform the primary side
voltage into a secondary side voltage based on turn ratio like any standard
iron core transfomer. But at a higher frequency since then we can have a
smaller transformer. For your calculation to hold some kind of magic duty
cycle will be needed.
The advantage of a SMPS mode PSU is that you also can very the duty cycle
and thus be able to regulate the output voltage as it is feed back to the
Your statement only holds for the interval the SMPS PSU is designed to
operate in. If it is designed for 110 V +/- 20% it will draw 20% current
when at lower limit. And vice versa. But now we are operating it outside
its specification. In that case the SMPSU PSU will not magically generate
the specified output voltage at a much lower outside spec input voltage.
It is clearly shown by the numbers given by Rob that with less input
voltage there will be less output. I.e 0.4V. No magic involved.
However. If we design a PSU for 10V input with another turn ratio then,
when in normal operating mode it will require 10 A as per your example. But
it is not the case here.
> If a supply is not explicitly designed for low supply voltages, it can
> lead to excessive primary-side currents.
> This is why it is a bad idea to 'run up' switching supplies from a variac
> or otherwise run them outside their specced input voltage range.
This is not a bad idea. With a variac you can study the behaviour of the
switching transistor much better. I always do it and it works
perfectly well. I measure current and voltage over the transistor and there
is no over current because of overload. Rather since the output voltage
will be very low the power developed over the load will be
What is bad though is when trying to attach a variac to a SMPS mode PSU
directly without feeding the control circuitry from a bench supply. You
will most likely not get it to do anything until the input voltage is
Now this is not a forward converter, but a Flyback type. I.e the
transformer has an airgap in it. The energy is stored in the magnetic field
and when the transistor turns off the energy will be delivered to the
secondary side. In a flyback design the current through the transistor will
rise linearly until turn off. Also there is no maximum duty cycle, but you
mustn't saturate the core.
> You don't say what the observed duty-cycle (ON-time) is. What would be
> expected is it's running 'wide-open' because it's trying to get enough
> energy through the transformer to meet the load demand while gasping for
> resources from the input because the input voltage is so low.
> So from the scenario you've set up, it's difficult to discern whether the
> behaviour is normal or faulty (the scenario masks the otherwise-observed
> faulty behaviour).
> All this is also dependant on how large your dummy load is (as a % of the
> rated max power output of the supply).
> If you want to run at a low input voltage, remove or very lightly load the
> From your schematic, there is a small load presented internally from
> various voltage dividers around the outputs, although not all the R values
> are in the schematic, so can't calc the current.
> If you still get the over-current SCR triggering, suspicion could lean
> towards a short somewhere - a winding in the main transformer, secondary
> rectifiers or caps - anything presenting an excessive energy sink to the
> main switcher, including over-sensitivity of the crowbar circuits on the
> secondary side. The secondary crowbar circuit monitors the output voltages
> relative to a reference. You could scope-monitor the gate of the SCR over
I would agree that a check for shorts in the output stages can be of
interest. Possibly disconnect one output stage at a time and see if that
make a difference.
> The spike you mention on the primary-side SCR gate without a corresponding
> spike on R13 does seem odd, seeing scope traces pic could be interesting,
> perhaps scope the anode, the gate and R13. Possibility of some odd trigger
> fault in the SCR.
> There is a small amount of filtering on the SCR-gate/over-current voltage
> divider (C18/2.2nF) so you would expect to a slightly averaged version of
> the voltage at R13 after the voltage divider (at the cap/gate).
> Aside: You have R27 & R28 at 20+20 ohms in your schematic. This is an
> awfully low R for dropping the hundreds of supply V down to the
> 16V/low-current of the 3842 supply. For schematic accuracy, you might
> double-check the value of those.
> 10/10 for your tenacity in this repair attempt.
More information about the cctech