Honneywell multics? from panels. the inline phots in this message folks -smecc

Charles Anthony charles.unix.pro at gmail.com
Sat Mar 12 09:27:18 CST 2016

On Sat, Mar 12, 2016 at 6:44 AM, Dave G4UGM <dave.g4ugm at gmail.com> wrote:

> The panels would be pretty much un-used Unlike 360 panels these were
> hidden behind doors for most of the time. Assuming the work the same on a
> Multics box as on a regular L66/DPS box the only time they were really used
> was if you split a 2 x CPU system into 2 x 1 CPU system, or changed the
> memory configuration from interleaved to non-interleaved. Pretty sure you
> could IPL from the console.

[My understanding; I wasn't there]

The display panels changed over time; later models had a minicomputer with
management software instead of the big panels.

Early models:

The CPU cabinet had two doors, with the panels on the inside of the door,
so that opening the door swung the panel out. (There were probably
additional panels exposed, but I'm not sure.)

One the panels was the CPU status, showing the contents of the registers
(A, Q, PPR, TSR, Xn, PARn), the major CPU states (fetch, execute,
interrupt, fault), and major status bits (Append Unit, Operation Unit,
Decimal Unit).

I understand it was common practice to leave that door open for it visual
appeal and highly visible 'things are running' status (including the 'idle
crawl' a distinctive pattern display when Multics was idle.

The panels labeled SCU are System Control Units; they were separate
cabinets. The SCU's contained the memory and handled all communication
between CPUs and between CPUs and IO controllers.

The panels labeled IOM are Input Output Managers; they connected the SCUs
to peripheral devices; also sometimes 'IOP' (Input Output Processor).

The enormous number of configuration switches is due to the extreme
modularity of the system. Core memory was in the SCUs, not the CPUs; each
SCU could have a varying amount of memory, in up to 4 banks of varying
sizes. Each bank could taken out of service, so defining the addressing of
the memory in each SCU was complex. Each CPU had to have a
matching memory configuration panel so that it knew which SCU to talk to
access a particular memory location.

Each CPU had to be cabled to each SCU.

Since the IOMs did DMA, the memory configuration panels are duplicated
there as well, and each IOM cabled to each SCU.

The only display panel I would want to utilize is the CPU status; the other
panels display information which the emulator does not necessarily have and
do not have the 'wow' factor.

-- Charles

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