Mattis Lind mattislind at
Mon Apr 6 02:09:58 CDT 2020

Den sön 5 apr. 2020 kl 23:53 skrev Rob Jarratt via cctalk <
cctalk at>:

> > -----Original Message-----
> > From: cctalk <cctalk-bounces at> On Behalf Of Brent Hilpert
> via
> > cctalk
> > Sent: 05 April 2020 21:18
> > To: Rob Jarratt <robert.jarratt at>; General Discussion:
> On-Topic
> > and Off-Topic Posts <cctalk at>
> > Subject: Re: VAXmate PSU
> >
> >
> > Switching power supplies are, to coin a phrase, voltage/current-ratio
> power
> > translators.
> > They will attempt to adjust the (cycle-averaged) input-current demand in
> > inverse proportion to the input voltage, to meet the power demand of the
> load.
> >
> > When you load a switching supply, and run it with a low input voltage, it
> will
> > attempt to increase the input-current demand, either with increased peak
> > current or increased duty-cycle (ON-time of primary switching
> transistor(s)).
> >
> > Suppose you have a load demand of 100W. At 100V input the input current
> > needed is 1A.
> > At 10V input, the input current needed is 10A.
> >
> > If a supply is not explicitly designed for low supply voltages, it can
> lead to
> > excessive primary-side currents.
> > This is why it is a bad idea to 'run up' switching supplies from a variac
> or
> > otherwise run them outside their specced input voltage range.
> >
> > You don't say what the observed duty-cycle (ON-time) is. What would be
> > expected is it's running 'wide-open' because it's trying to get enough
> energy
> > through the transformer to meet the load demand while gasping for
> resources
> > from the input because the input voltage is so low.
> >
> > So from the scenario you've set up, it's difficult to discern whether the
> > behaviour is normal or faulty (the scenario masks the otherwise-observed
> > faulty behaviour).
> >
> I have to say that when I was thinking about this, I did wonder if the
> problem was that it was trying to raise the output voltage with not a lot
> of
> input, and that therefore the duty cycle would be too high. I will remove
> the variac from the equation. For the record I was seeing a duty cycle of
> about 50%. In later testing at 240VAC the duty cycle does seem a lot lower.

When you use a variac the developed voltage on the secondary side will be
much lower due to the turn ratio of the transformer. You measured 0.4V on
the 5V line if I understand you correctly. That means approx 1/12 of
nominal output. That would then lead to 1/12 current on the secondary side
and 1/144th of the power developed. With this little power developed on the
secondary side there is no chance you can exceed the power transistor

I do this all the time. I measure transistor current when doing this and
there are not a ten fold or so increase in current as Brent claim.

By using a variac and you can measure and study waveforms and detect
problems in driving circuits without killing the main switch transistor.
You can study actions of crowbar functions.

There are two different basic variants for SMPS mode PSUs. Forward or
Flyback. Forward are normally used in higher power designs while flyback is
lower power.

A forward mode PSU is like creating a square wave AC current and feeding it
to a transformer. In forward mode the duty cycle cannot be more than 50%
since the core need to reset before next cycle. The output will be a in
relation to the input by the turn ratio of the transformer. A forward
converter need a way to reset the transformer, either by various diodes on
the primary diode or using various bridge topologies for the switching
system. There are also filtering inductors on the secondary side.

However your PSU look very much like a flyback design. It means that the
transformer has an airgap.  It is actually both and inductor and
transformer. A flyback converter stores energy in the inductor when the
transistor is turned on and then when turned off the energy is
transfered to the load. When the transistor is switched on the current
will increase linearly in the primary winding.  This will continue until
the transistor is switched off or the core is saturated. When saturated the
current will rise sharply. This also means that the duty cycle can be
almost 100% only limited by the design of the transformer so that it does
not saturate.

Saturation is a condition you don't want to have. What could be interesting
is to study the waveform of the drain current in more detail. You need to
set timebase of your oscilloscope to a much shorter time span to in
detail study the increase of current in the drain.

The UC3842 does allow up to 100% duty cycle while the other cousins in the
same family, UC3844 and UC3845, only go up to 50%, thus made for
forward converters.

It can be interesting to investigate if the feed back circuits works as
expected. Usually one can inject lab supply voltages on the outputs and
find out if the control circuitry reacts properly. The problem with your
supply is that it is fairly complicated on the secondary side. While
reading the schematic it is not immediately clear that the op-amps will be
operating properly by feeding in +5V and +12 V backwards, unfortunately.

Then another option is to cut open the feed back path and inject a feedback
voltage from a labsupply at the input of the UC3842. You can then vary it
while there are supply voltage to the UC3842 and you can then monitor the
duty cycle of the UC3842.

If you cut away the secondary side output stage you have to bear in mind
that this is most likely a flyback design. Without any load at the output
of the transformer the energy stored in the magnetic field has no where to
go. You could get very high voltages on the drain. I suggest that you have
a load resistance over each output of the transformer. By doing this
together with breaking up the feed back loop as described above you could
monitor how the primary side is doing its switching. You should not try to
do this without a variac.

While having the output stages cut away from the transformer you could also
test the output stages by powering them from the transformer side by a
bench supply. What happens if you turn up the voltage slowly? Will the
crowbar trigger or not. Is a proper feed back voltage generated.

A lot of things to test, but one common note is that you need to study your
waveforms on a cycle basis not 100 ms/division. More like 10 us/division.

Good luck!


> > All this is also dependant on how large your dummy load is (as a % of the
> rated
> > max power output of the supply).
> >
> > If you want to run at a low input voltage, remove or very lightly load
> the
> output.
> > From your schematic, there is a small load presented internally from
> various
> > voltage dividers around the outputs, although not all the R values are in
> the
> > schematic, so can't calc the current.
> > If you still get the over-current SCR triggering, suspicion could lean
> towards a
> > short somewhere - a winding in the main transformer, secondary rectifiers
> or
> > caps - anything presenting an excessive energy sink to the main switcher,
> > including over-sensitivity of the crowbar circuits on the secondary side.
> The
> > secondary crowbar circuit monitors the output voltages relative to a
> reference.
> > You could scope-monitor the gate of the SCR over there.
> I have already done a ringing test on the main transformer, and I think
> that
> it is OK. One of the windings does not ring very well, but I think it is
> one
> that has few windings and supplies the on-going power to the primary side
> once the PSU has started up. I have also done a bit of testing on the
> secondary rectifiers, but not found anything so far. I will look at
> secondary side again more closely.
> >
> > The spike you mention on the primary-side SCR gate without a
> corresponding
> > spike on R13 does seem odd, seeing scope traces pic could be interesting,
> > perhaps scope the anode, the gate and R13. Possibility of some odd
> trigger
> > fault in the SCR.
> I have obtained a scope trace as you suggest. R32 is still lifted so the
> UC3842 is powered by the bench PSU, but I am using the full 240VAC (no
> variac). The channels are:
> 1.      Ch1. 555 timer.
> 2.      Ch2. D19 Anode
> 3.      Ch3. D19 Gate.
> 4.      Ch4. Q1 Source.
> The picture is here:
> ator.png
> <>
> > There is a small amount of filtering on the SCR-gate/over-current voltage
> > divider (C18/2.2nF) so you would expect to a slightly averaged version of
> the
> > voltage at R13 after the voltage divider (at the cap/gate).
> >
> > Aside: You have R27 & R28 at 20+20 ohms in your schematic. This is an
> awfully
> > low R for dropping the hundreds of supply V down to the 16V/low-current
> of
> the
> > 3842 supply. For schematic accuracy, you might double-check the value of
> > those.
> You are correct, I have mixed up the values with R30 and R31, the correct
> value is 15K. I have updated the schematic, and rearranged it to look
> diagrammatically more like a sample diagram in the TI datasheet for the
> UC3842. The updated schematic is here:
> ator.png
> <>
> >
> > 10/10 for your tenacity in this repair attempt.
> Thank you, I am sure it will be simple when I find the problem, and I am
> learning a lot.

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