Kryoflux or Catweasle

Paul Koning paulkoning at comcast.net
Thu May 25 11:39:26 CDT 2017


> On May 25, 2017, at 12:14 PM, ben <bfranchuk at jetnet.ab.ca> wrote:
> 
> On 5/25/2017 9:39 AM, Paul Koning wrote:
>>> 
>> You can do the same with other VHDL processors.  If you don't want to deal with a particular manufacturer and potentially pay major money for the tool set, there's GHDL, a open source GCC-based VHDL modeler.  It has some handy capabilities, such as a way to hook C functions into the model.
>> 	paul
> 
> I use the other BRANDS. I never liked VHDL because I can never figure how the logic port mapping works and the on edge logic.
> Also what is wrong with custom designs IN ADL,PAL and WINCUPL. Your FPGA
> logic is so custom you have no good portable logic for ram or rom on chip any how.

That remains to be seen.  I'm doing a very large model on GHDL right now.  Eventually it will move to an FPGA.  At that point, a few small details, like the inner bits of the memory model, will be device dependent.  Right now in that spot I use an interface taken, more or less, from a Xilinx app note.  But that's only a few hundred lines out of about 200k lines.  

As for custom languages, I've used ABEL (from Lattice).  It was ok for a bit of logic amounting to a few dozen gates, but I'm glad I'll never have to go back to it.

There is of course Verilog as another option.  I use VHDL because that's what I learned first and because I found GHDL.  There's a nice opportunity for language wars here which I'll decline.

	paul




More information about the cctalk mailing list