Clearpoint DCME/Q4E configuration

Johnny Billquist bqt at update.uu.se
Tue Aug 18 11:42:29 CDT 2015


On 2015-08-18 16:20, Noel Chiappa wrote:
>      > From: Johnny Billquist
>
>      > DEC's memory boards never had any jumpers for PMI as such.
>
> Yes, and if you plug one of their PMI memory boards into a Q/Q backplane, it
> will emit magic smoke, too! :-)

I don't remember if I've ever tried that, but I can believe that some 
jumpers would need to be moved around for a Q-Q slot. I have only put 
the memory in Q-CD slots, and it works fine both as PMI and as normal 
Q-bus memory. No jumpers moved.

> I think that's why this thing has the jumpers - to allow it to be used in a
> Q/Q backplane. It would, of course, only be normal (slower) QBUS memory, but
> at least one could use it there.
>
> However, I am unable to verify that hypothesis. (See below.)
>
>
> I looked at the jumpers along the edge in the C/D finger region, and a lot
> of them _do_ connect to pins used in the PMI bus. (Confusingly, a number
> connect to _other_ pins - I can see I have some detective work in front
> of me here!)
>
> However, that made it likely that the one that had jumpers on all those pins
> was configured for PMI use, so I rolled the dice, and tried plugging that
> board into a Q22/CD backplane, along with a KDJ11-B, and after a short bout of
> 'tired memory' (see my previous post), it did come up as a 4MB PMI memory!
>
> (Parity, though, not CRC - which might make sense, I guess - it has 148
> memory chips on it, which is a multiple of 37, so 32 + byte parity, plus a
> spare chip, I would guess?)

By CRC, I guess you mean ECC. And with 37 bits, I think it should have 
ECC. However, the detection of ECC depends on the CSR address set 
correctly. But I could be wrong as well.

> However, when I plugged the other one in - nada. No response at all; the boot
> PROM bitched about 'no memory at 0'. So I'm not sure _what_ that
> configuration is for.

Would sound like it was configured for a non-zero start address maybe? 
But if you tried with the switches/jumpers the same as on the board 
working then it sounds like it would just be broken.

> So then I took a flier (although the cards use the identical PCB, they do
> have a few minor differences in chip rev in a couple of the programmable
> chips), and put the jumper config from the working PMI card onto the other
> card, and it did 'sort of' come up as a PMI card.
>
> The boot PROM was complaining about "Memory CSR Error" (I'll have to
> investigate that further), _but_ the memory was shown (by the boot PROM 'map'
> command) as PMI, and my own memory-test program showed it was all working OK.

As I've mentioned several times. The cards themself work as PMI memory 
or normal Qbus memory depending on their location with relation to the 
CPU. Memory before CPU -> PMI memory. Memory after CPU -> normal Qbus 
memory.

And then the cards also have a CSR register or two, which is used for 
various things. And they are expected to be at specific addresses. I 
can't recall off my head what the addresses are, but that can be looked 
up. If you have a memory starting at address 0, there should be a CSR at 
a specific address as well, that access the card. The second memory card 
is supposed to be configured to start where the first one ends in memory 
space, and use the second CSR address, and so on...

	Johnny



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